The present invention relates to semiconductor device fabrication and integrated circuits and, more specifically, to structures including one or more field-effect transistors and methods for forming a structure that includes one or more field-effect transistors.
A fin-type field-effect transistor (FinFET) is a non-planar device structure for a field-effect transistor that is capable of being more densely packed in an integrated circuit than planar field-effect transistors. A FinFET may include a fin consisting of a body of semiconductor material and a gate electrode that wraps about a central portion of the fin body. A FinFET further includes heavily-doped source/drain regions formed in sections of the fin body that are not overlapped by the gate electrode. The arrangement between the gate electrode and fin improves control of the channel and reduces the leakage current when the FinFET is in its ‘off’ state. This, in turn, enables the use of lower threshold voltages and results in better performance and power.
In some FinFET technologies, a gate cut is performed to interrupt the continuity of a dummy gate in order to divide the dummy gate into segments. The segmentation is reproduced with the dummy gate is replaced with the replacement metal gate. The gate cut may be performed after the interlayer dielectric fill is performed and the dummy gate is revealed by polishing for removal and replacement. Non-critical gate cuts are large in dimensions, and critical gate cuts are small in dimensions in comparison with non-critical gate cuts. As fin pitch scales downward, the critical gate cut at locations between fins is challenging with respect to process margin. Conventional gate cut patterning and etching process may cause fin damage, especially for critical gate cuts of small critical dimension. In addition, due to small sizing of the critical gate cut, incomplete pull of the dummy gate may reduce yield.
Improved structures including one or more field-effect transistors and methods for forming a structure that includes one or more field-effect transistors are needed.